DOI Number : 10.5614/itbj.ict.2012.6.2.2
Hits : 10

A Low-Complexity and High-Throughput RTL Design of a BCH (15,7) Decoder

Hendra Setiawan

Electrical Engineering Department, Islamic University of Indonesia
Jl. Kaliurang Km.14.5 Yogyakarta, Indonesia, 55583
Email: hendra.setiawan@uii.ac.id


Abstract. The Bose, Chaudhuri and Hocquenghem (BCH) codes form a large class of powerful random-error correcting cyclic codes. However, the implementation of its decoder requires high-complexity computation resources with a huge number of sequential circuits. This paper presents a low-complexity register transfer level (RTL) circuit design of a BCH decoder. In accordance with the table relationship between the syndrome and the error bit position, we propose a circuit that is mostly occupied by combinational elements without any sequential evolvement. Therefore the designed system has a low complexity and high throughput properties. The implementation of the BCH (15,7)decoder on Virtex 5 FX70TFF1136 requires 77 look-up tables (LUTs) with the maximum throughput reaching 1.7 Gbps.

Keywords: BCH decoder; RTL; cyclic code; syndrome; error correction

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